Name
Abstract | ||
|---|---|---|
In the last few years, Transactional Memories (TMs) have been shown to be a parallel programming model that can effectively combine performance improvement with ease of programming. Moreover, the recent introduction of TM-based ISA extensions, by major microprocessor manufacturers, also seems to endorse TM as a programming model for today's parallel applications. One of the central issues in designing Software TM (STM) systems is to identify mechanisms/heuristics that can minimize contention arising from conflicting transactions. Although a number of mechanisms have been proposed to tackle contention, such techniques have a limited scope, as conflict is avoided by either interrupting or serializing transaction execution, thus considerably impacting performance. To deal with this limitation, we have proposed a new effective transaction scheduler, along with a conflict-avoidance heuristic, that implements a fully cooperative scheduler that switches a conflicting transaction by another with a lower conflicting probability. This paper extends such framework and introduces a new heuristic, built from the combination of our previous conflict avoidance technique with the Contention Intensity heuristic proposed by Yoo and Lee. Experimental results, obtained using the STMBench7 and STAMP benchmarks atop tinySTM, show that the proposed heuristic produces significant speedups when compared to other four solutions. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/HiPC.2013.6799126 | High Performance Computing |
Keywords | Field | DocType |
parallel programming,probability,processor scheduling,storage management,transaction processing,STAMP benchmarks,STM systems,STMBench7,TM-based ISA extensions,conflict avoidance,conflict-avoidance heuristic,conflicting probability,conflicting transaction,contention intensity heuristic,cooperative scheduler,mechanisms/heuristics identification,parallel applications,parallel programming model,software TM systems,transaction execution,transaction scheduling,transactional memories | Transaction processing,Heuristic,Programming paradigm,Computer science,Parallel computing,Conflict avoidance,Heuristics,Parallel programming model,Database transaction,Distributed transaction,Distributed computing | Conference |
ISSN | Citations | PageRank |
1094-7256 | 2 | 0.36 |
References | Authors | |
18 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Marcio M. Pereira | 1 | 2 | 0.36 |
| Alexandro Baldassin | 2 | 48 | 10.02 |
| Guido Araujo | 3 | 40 | 5.23 |
| Luiz Eduardo Buzato | 4 | 2 | 0.36 |