Name
Abstract | ||
|---|---|---|
This brief presents a technique that can fully exploit the data dependency of flash memory cell damage to improve the program/erase (P/E) cycling endurance of nand flash memory. The key is to opportunistically leverage data lossless compressibility and utilize the compression gain to realize memory-damage-aware data manipulation to reduce the cycling-induced physical damage. Based upon experiments using commercial sub-22-nm MLC nand flash memory chips, we show that the proposed design technique can improve the P/E cycling endurance by 50%. We further carried out application-specific integrated circuit design to demonstrate the practical feasibility for implementing the proposed design technique. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/TVLSI.2014.2332099 | VLSI) Systems, IEEE Transactions |
Keywords | Field | DocType |
nand circuits,application specific integrated circuits,flash memories,nand flash memory,application-specific integrated circuit design,flash memory cell,memory-damage-aware data manipulation,program/erase cycling endurance,true-damage-aware enumerative coding,endurance,nand flash memory.,enumerative coding,bit error rate,memory management,data compression,encoding | Dynamic random-access memory,Semiconductor memory,Interleaved memory,Flash memory,Flash file system,Computer science,Non-volatile random-access memory,Real-time computing,Memory management,Computer hardware,Computer memory | Journal |
Volume | Issue | ISSN |
23 | 6 | 1063-8210 |
Citations | PageRank | References |
0 | 0.34 | 7 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jiangpeng Li | 1 | 55 | 5.29 |
| Kai Zhao | 2 | 115 | 6.20 |
| Jun Ma | 3 | 93 | 9.42 |
| Tong Zhang | 4 | 1352 | 98.67 |