Title
Handling Nondeterminism in Logic Simulation So That Your Waveform Can Be Trusted Again
Abstract
The increasing complexity of integrated circuits pushes for more aggressive design optimizations, such as resetting only part of design registers, that can leave some registers in nondeterministic (X) states. Such Xs may invalidate the correctness of logic simulation due to X-optimism and X-pessimism, producing simulation waveforms that can not be trusted. Although formal methods can resolve the nondeterminism problem, they are not scalable enough to handle today's multi-million gate designs. To address this problem, we developed a scalable X-analysis methodology and successfully applied it to solve three real industrial problems --- one identifies missing Xs in RTL designs while the other two remove incorrect Xs to repair gate-level simulation.
Year
DOI
Venue
2016
10.1109/MDT.2011.75
IEEE Design & Test
Keywords
DocType
Volume
b hardware,b.1.3 control structure reliability,b.1.3.a diagnostics,b.1.3.b error-checking,b.1.3.c redundant design,b.1.3.d test generation,b.1.4.e verification,b.2.2.a simulation,b.2.2.b verification,b.2.3 reliability,b.4.5.f test generation,b.5.2.e verification,b.6.2 reliability and testing,b.6.3.d simulation,b.6.3.f verification,testing,and fault-tolerance
Journal
PP
Issue
ISSN
Citations 
99
2168-2356
3
PageRank 
References 
Authors
0.51
4
5
Name
Order
Citations
PageRank
Kai-hui Chang121619.41
hongzu chou230.51
Haiqian Yu3586.33
Dylan Dobbyn491.21
Sy-Yen Kuo52304245.46