Name
Abstract | ||
|---|---|---|
Many present day IO specifications require over- voltage protection. USB2.0, a popular serial interface, requires a 5.25V short circuit protection for the signal pins. This becomes a challenging requirement to meet in Ultra Deep Sub-micron (UDSM) technologies. The challenge lies in protecting the low- voltage gate oxides from higher voltage in different modes of operation including power down. A protection circuit is proposed in this paper that also protects from overshoots due to a mismatched cable. The proposed circuit also ensures that supply for the output pad driver doesn't get charged during the high voltage event. It continues to protect during power down drawing ~12μA current ensuring low power operation. The protection circuit presented in this paper is implemented in 45nm CMOS, without using any 3.3V gate-oxide transistors. This circuit consumes 300μA from 3.3V during functional mode. The area of this circuit is 90×320μm2. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ISCAS.2011.5937994 | Circuits and Systems |
Keywords | Field | DocType |
CMOS integrated circuits,driver circuits,low-power electronics,overvoltage protection,peripheral interfaces,transceivers,CMOS technology,IO specification,UDSM technology,USB transceiver,current 300 muA,gate-oxide transistor,high voltage protection,low-voltage gate oxide protection,output pad driver,overvoltage protection,short circuit protection,signal pin,size 45 nm,ultradeep submicron technology,voltage 3.3 V,voltage 5.25 V | Logic gate,Computer science,Overvoltage,Voltage,Electronic engineering,CMOS,Short circuit,High voltage,Electrical engineering,USB,Low-power electronics | Conference |
ISSN | ISBN | Citations |
0271-4302 E-ISBN : 978-1-4244-9472-9 | 978-1-4244-9472-9 | 0 |
PageRank | References | Authors |
0.34 | 1 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jagdish Chand | 1 | 0 | 0.68 |
| Ravi Mehta | 2 | 3 | 1.52 |
| Sumantra Seth | 3 | 9 | 2.80 |
| Sujoy Chakravarty | 4 | 12 | 3.21 |