Paper Info
Title
Model-driven design flow for distributed control in reconfigurable FPGA systems
Abstract
One of the most challenging and time-consuming design tasks for dynamically reconfigurable FPGA (Field Programmable Gate Array) systems is the design of runtime-adaptation control. This aspect covers various points such as runtime-monitoring, reconfiguration decision-making and reconfiguration realization. In this paper, we propose a control design flow aiming at facilitating the designers work and enhancing their productivity through high design reuse and automation. The proposed flow combines control distribution and Model-Driven-Engineering (MDE). The distributed control structure proposed in this flow aims at facilitating the reuse of the control design by using separate controllers for local and global control problems. The flow enables designers to move from high-level control models, using an extended version of the MARTE (Modeling and Analysis of Real-Time and Embedded Systems) UML standard profile, to an automatic generation of the corresponding VHDL code. The flow was validated through a video processing case study from modeling to implementation in FPGA.
Year
DOI
Venue
2014
10.1109/DASIP.2014.7115631
Design and Architectures for Signal and Image Processing
Keywords
Field
DocType
distributed control,embedded systems,field programmable gate arrays,hardware description languages,integrated circuit design,marte,mde,uml standard profile,vhdl code,vhsic hardware description language,field programmable gate array,high-level control model,model-driven design fow,model-driven engineering,modeling and analysis of real-time and embedded system,reconfigurable fpga system,reconfiguration decision-making,reconfiguration realization,runtime-adaptation control,runtime-monitoring,unified modeling language,very high speed integrated circuit,video processing,fpga,model-driven-engineering,partial dynamic reconfiguration,uml marte,model driven engineering
Video processing,Computer architecture,Unified Modeling Language,Computer science,Model-driven architecture,Field-programmable gate array,Real-time computing,Automation,Design flow,VHDL,Control reconfiguration,Embedded system
Conference
ISSN
Citations 
PageRank 
2164-9766
0
0.34
References 
Authors
0
6
Name
Order
Citations
PageRank
Chiraz Trabelsi100.34
Mettali, S.200.34
R. Ben Atitallah392.38
Jean-luc Dekeyser443353.54
Samy Meftali518318.21
Rabie Ben Atitallah617320.23