Name
Abstract | ||
|---|---|---|
Turbo decoders for modern wireless communication systems are required to support a wide range of code rates. The maximum supported code rate has strong impact on the choice of turbo decoder algorithm and architecture. This paper explores the problem of achieving high performance with turbo decoders at high code rates, and provides solutions on algorithmic and architectural level. A standard-compliant turbo decoder ASIC prototype for 3GPP Evolved EDGE has been implemented in 0.18 μm CMOS, and corresponding measurements proof the results of our analysis. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/VLSI-SoC.2012.6379008 | VLSI and System-on-Chip |
Keywords | Field | DocType |
3G mobile communication,CMOS integrated circuits,radio networks,turbo codes,3GPP Evolved EDGE,CMOS,algorithmic level,architectural level,high code rates,size 0.18 mum,standard-compliant turbo decoder ASIC prototype,turbo decoder design,wireless communication systems | Turbo,Code rate,Computer science,Serial concatenated convolutional codes,Turbo code,Application-specific integrated circuit,Electronic engineering,Turbo equalizer,Soft-decision decoder,Decoding methods,Computer hardware | Conference |
ISSN | ISBN | Citations |
2324-8432 | 978-1-4673-2656-8 | 8 |
PageRank | References | Authors |
0.64 | 4 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Christian Benkeser | 1 | 72 | 3.63 |
| Christoph Roth | 2 | 52 | 3.56 |
| Qiuting Huang | 3 | 10 | 1.90 |