Name
Abstract | ||
|---|---|---|
The sequential execution of processing elements by time-multiplexing FPGA resources using single-island partial reconfiguration allows for resource-efficient designs in comparison to static FPGA implementations. Designing a processing chain for such a system requires the chain to be partitioned into reconfigurable modules, which can be sequentially executed. For this task, we will present an approach to partition an existing digital signal processing chain into separate modules with the goal to obtain a balanced logic occupation. Furthermore, we will show how the overhead of context switching can be reduced by frame-aware data processing and we will introduce a context-annotation scheme for synchronous data flow graphs. After applying our findings to a reconfigurable digital audio broadcasting receiver and quantifying the benefits and drawbacks of time-multiplexed execution, we will finally show that the time-multiplexed execution of receiver components decreases the resource consumption as compared to the static design. |
Year | Venue | Keywords |
|---|---|---|
2012 | Design and Architectures for Signal and Image Processing | data flow graphs,digital audio broadcasting,field programmable gate arrays,radio receivers,reconfigurable architectures,context annotation scheme,context switching,digital audio broadcasting,digital signal processing chain,dynamic partial reconfiguration,frame aware data processing,reconfigurable FPGA based DAB receiver,static FPGA,synchronous data flow graphs,time multiplexed execution,Context Switching,Digital Audio Broadcasting,Dynamic Partial Reconfiguration,Partitioning |
Field | DocType | ISBN |
Graph,Digital signal processing,Data processing,Computer science,Field-programmable gate array,Real-time computing,Digital audio broadcasting,Synchronous Data Flow,Control reconfiguration,Context switch,Embedded system | Conference | 978-2-9539987-4-0 |
Citations | PageRank | References |
0 | 0.34 | 5 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Michael Feilen | 1 | 0 | 0.34 |
| Andreas Iliopoulos | 2 | 0 | 0.68 |
| Matthias Ihmig | 3 | 5 | 1.15 |
| Walter Stechele | 4 | 365 | 52.77 |