Name
Abstract | ||
|---|---|---|
A13-port 64-word 41 b fully associative content-addressable register file that is part of a dual-issue superscalar ARMv7-architecture CPU is described. The register file is part of the register-renaming function within the CPU, allowing for the resolution of data hazards common to out-of-order superscalar CPUs. The register file occupies 0.062 mm2 in a 1.1 V 45 nm CMOS technology and operates at 1.4 GHz while consuming 21 mW. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/ISSCC.2010.5433924 | Solid-State Circuits Conference Digest of Technical Papers |
Keywords | Field | DocType |
CMOS memory circuits,UHF integrated circuits,content-addressable storage,microprocessor chips,shift registers,CMOS,CPU,associative content-addressable register file,data hazards resolution,dual-issue superscalar ARMv7-architecture,frequency 1.4 GHz,power 21 mW,register-renaming function,size 45 nm,voltage 1.1 V | Logic gate,Shift register,Comparator,Computer science,Operand,Register file,Electronic engineering,CMOS,Content-addressable storage,Throughput,Computer hardware,Embedded system | Conference |
ISSN | ISBN | Citations |
0193-6530 | 978-1-4244-6033-5 | 4 |
PageRank | References | Authors |
0.51 | 1 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Greg Burda | 1 | 4 | 0.51 |
| Yesh Kolla | 2 | 4 | 0.51 |
| Dieffenderfer, J. | 3 | 4 | 0.51 |
| Fadi Hamdan | 4 | 4 | 0.51 |