Title
Data mapping for unreliable memories
Abstract
Future digital signal processing (DSP) systems must provide robustness on algorithm and application level to the presence of reliability issues that come along with corresponding implementations in modern semiconductor process technologies. In this paper, we address this issue by investigating the impact of unreliable memories on general DSP systems. In particular, we propose a novel framework to characterize the effects of unreliable memories, which enables us to devise novel methods to mitigate the associated performance loss. We propose to deploy specifically designed data representations, which have the capability of substantially improving the system reliability compared to that realized by conventional data representations used in digital integrated circuits, such as 2's-complement or sign-magnitude number formats. To demonstrate the efficacy of the proposed framework, we analyze the impact of unreliable memories on coded communication systems, and we show that the deployment of optimized data representations substantially improves the error-rate performance of such systems.
Year
DOI
Venue
2012
10.1109/Allerton.2012.6483283
Communication, Control, and Computing
Keywords
DocType
Volume
data structures,digital integrated circuits,reliability,semiconductor technology,signal processing,DSP systems,coded communication systems,data mapping,digital integrated circuits,digital signal processing,error-rate performance,optimized data representations,reliability issues,semiconductor process technologies,system reliability,unreliable memories
Journal
abs/1212.4950
ISSN
ISBN
Citations 
2474-0195
978-1-4673-4537-8
9
PageRank 
References 
Authors
0.58
8
4
Name
Order
Citations
PageRank
Christoph Roth1523.56
C. Benkeser290.58
C. Studer390.58
G. Karakonstantis490.58