Name
Title | ||
|---|---|---|
Pipelined Architectures for Real-Valued FFT and Hermitian-Symmetric IFFT With Real Datapaths |
Abstract | ||
|---|---|---|
This brief presents novel parallel pipelined architectures for the computation of the fast Fourier transform (FFT) of real signals and inverse FFT of Hermitian-symmetric signals using only real datapaths. The real FFT structure is transformed by transferring twiddle factors to subsequent stages, such that each stage in the proposed flow graph contains one column of butterfly units and one column of twiddle factor blocks, and each column of the flow graph contains only N samples. This is a key requirement for the design of architectures that are based on only real datapaths. This structure is then mapped to pipelined architectures. The proposed architectures can be used with any FFT size or level of parallelism, which is a power of two. A systematic method to design architectures for FFTs with different levels of parallelism and radix values is presented. By modifying the FFT flow graph for real-valued samples, this methodology leads to architectures with fewer adders, delays, and interconnections. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/TCSII.2013.2268411 | Circuits and Systems II: Express Briefs, IEEE Transactions |
Keywords | Field | DocType |
digital arithmetic,fast Fourier transforms,flow graphs,hypercube networks,inverse transforms,parallel architectures,pipeline processing,FFT flow graph,FFT size,Hermitian-symmetric IFFT,Hermitian-symmetric signal,adders,architecture design,butterfly unit,delays,fast Fourier transform,interconnections,inverse FFT,parallel pipelined architecture,parallelism level,radix value,real FFT structure,real datapath,real signals,real-valued FFT,twiddle factor block,Fast Fourier transform (FFT),Hermitian-symmetric inverse FFT (IFFT),IFFT,parallel processing,pipelining,real FFT (RFFT),real datapath | Pipeline (computing),Split-radix FFT algorithm,Control flow graph,Adder,Twiddle factor,Prime-factor FFT algorithm,Computer science,Parallel computing,Fast Fourier transform,Power of two | Journal |
Volume | Issue | ISSN |
60 | 8 | 1549-7747 |
Citations | PageRank | References |
13 | 0.95 | 4 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sayed Ahmad Salehi | 1 | 31 | 3.78 |
| Rassoul Amirfattahi | 2 | 13 | 0.95 |
| keshab k parhi | 3 | 3235 | 369.07 |