Abstract | ||
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Hardware and Software co-design has become one of the main methodologies in modern embedded systems. The partitioning step, i.e. to decide which components of the system should be implemented in hardware and which ones in software, is the most important step in the embedded systems. Since the costs and delays of the final design strongly depend on partitioning results, there is a need to get an accurate estimate for hardware area, delay and power. However, accurate delay estimation methods are slow as they need a scheduling step. In this paper, we propose a reliable delay estimation method to be used within the partitioning step prior to the scheduling step. |
Year | DOI | Venue |
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2013 | 10.1109/MWSCAS.2013.6674880 | Circuits and Systems |
Keywords | Field | DocType |
embedded systems,hardware-software codesign,delay estimation method,hardware-software partitioning,partitioning step,prescheduling delay estimation,control-data flow graphs,design space exploration,fpgas,hardware/software co-design,hardware/software partitioning,high-level synthesis,mpsoc | Avionics software,Hardware compatibility list,Scheduling (computing),Computer science,Real-time computing,Control engineering,Software,Software construction,Hardware software,Hardware architecture,Embedded system | Conference |
ISSN | Citations | PageRank |
1548-3746 | 1 | 0.38 |
References | Authors | |
11 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Hassan, R.O. | 1 | 2 | 1.16 |
M. B. AbdelHalim | 2 | 45 | 7.21 |
Habib, S.E.-D. | 3 | 7 | 2.38 |