Name
Abstract | ||
|---|---|---|
This paper presents a simple but effective improvement for source coupled logic (SCL) circuits and its application to dual modulus frequency prescaler design. By biasing the standard resistor-load SCL structure with a bias current inversely proportional to the resistor, logic levels are kept over process and temperature variations and, as a result, reliable operation is preserved over a wider range. This technique has been tested in a 1.8 V–0.18 μm CMOS front-end 8/9 prescaler, showing its feasibility for the target 1.35–2.7 GHz input range over all corners and a commercial temperature range of (0, +85 ºC). |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/ISCAS.2015.7169124 | International Symposium on Circuits and Systems |
Keywords | DocType | ISSN |
Biasing Technique,Dual Modulus Prescaler,Process Immunity,Source Coupled Logic,Wide Frequency Range | Conference | 0271-4302 |
Citations | PageRank | References |
0 | 0.34 | 2 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Cristina Azcona | 1 | 34 | 6.35 |
| Calvo, B. | 2 | 6 | 1.92 |
| Medrano, N. | 3 | 4 | 1.96 |
| Celma, S. | 4 | 12 | 2.78 |