Title
Simple technique for prediction of breakdown voltage of ultrathin gate insulator under ESD testing
Abstract
In this study, simple ramped voltage TLP (RV-TLP) measurement was utilized to predict breakdown voltage (BVOX) and number of pulses to breakdown (NBD) under ESD testing. The proposed prediction method does not require lengthy DC-TDDB measurements but instead utilizes quick Ramped Voltage (RV) stress measurements to calculate a voltage to breakdown (BVOX) in the ESD timeframe. From voltage ramping rate dependence of QBD and breakdown current (JBD), the power law between QBD and JBD was obtained. By using this QBD-JBD correlation, we succeeded the predictions of BVOX and NBD analytically, and these values correspond to that for conventional constant-voltage TLP measurement. Furthermore, according to the evaluation of QP, anode-hole-injection (AHI) model is still adaptable for the breakdown under nanosecond pulse ESD testing.
Year
DOI
Venue
2015
10.1109/ICICDT.2015.7165892
ICICDT
Keywords
Field
DocType
Anode-hole-injection model,Breakdown voltage,ESD,SiON,TLP
Logic gate,Gate insulator,Voltage,Electronic engineering,Breakdown voltage,Engineering,Nanosecond,Power law
Conference
Citations 
PageRank 
References 
0
0.34
1
Authors
2
Name
Order
Citations
PageRank
Mitani, Yuichiro100.34
Kazuya Matsuzawa273.18