Abstract | ||
---|---|---|
A 1-GHz input bandwidth 6-bit analog-to-digital (A/D) converter is described. The A/D converter is designed for an Ultra-Wideband Impulse Radio (UWB-IR) receiver that needs to digitize an input signal with a higher frequency than the sampling frequency. With the proposed under-sampling technique, sampling is executed with low-current consumption by separating a sampling capacitor from an operational amplifier and accumulating the offset voltage of the amplifier in another capacitor. In addition, a low-power comparator is proposed, which reduces bias current dynamically corresponding to its input voltage level. The A/D converter is implemented in a 0.18-mu m CMOS process technology, which achieves an effective number of bits of 4.9 for input signals with frequencies greater than 1 GHz at 32 M samples/s, and consumes 0.89 mA at a 1.8-V supply. The converter occupies a 0.18 mm(2) area. |
Year | DOI | Venue |
---|---|---|
2007 | 10.1109/ESSCIRC.2007.4430271 | Proceedings of the European Solid-State Circuits Conference |
Keywords | DocType | ISSN |
sampling technique,effective number of bits,sampling frequency,cmos integrated circuits,ultra wideband,radio receivers,operational amplifier | Conference | 1930-8833 |
Citations | PageRank | References |
2 | 0.55 | 4 |
Authors | ||
11 |
Name | Order | Citations | PageRank |
---|---|---|---|
takashi nakagawa | 1 | 2 | 0.55 |
Tatsuji Matsuura | 2 | 27 | 8.16 |
Eiki Imaizumi | 3 | 4 | 1.36 |
Junya Kudoh | 4 | 7 | 3.77 |
Goichi Ono | 5 | 61 | 20.30 |
Masayuki Miyazaki | 6 | 41 | 18.56 |
Akira Maeki | 7 | 13 | 3.31 |
yoshinori ogata | 8 | 2 | 0.55 |
Shinichi Kobayashi | 9 | 2 | 0.89 |
Noboru Koshizuka | 10 | 225 | 46.68 |
Ken Sakamura | 11 | 291 | 76.46 |