Name
Abstract | ||
|---|---|---|
LU decomposition is a key kernel of computation in liner algebra and various engineering applications. In this paper, based on the platform of FPGA, we proposed a novel architecture to accelerate the computation. The processing element (PE) is reused via pipeline technology, which makes our design more resource-efficient and available to applications with limited hardware resources and real-time requirement. Our design works at 73.5MHZ, achieves a fairly good acceleration ratio considering the application scenarios and the resources consumed. The design can be easily expanded to play a role in higher dimension matrix factorization situation. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/SysEng.2015.7302767 | 2015 IEEE International Symposium on Systems Engineering (ISSE) |
Keywords | DocType | Citations |
LU decomposition,FPGA,Pipeline technology,Parallel computing,Kalman filtering | Conference | 0 |
PageRank | References | Authors |
0.34 | 4 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| yang wang | 1 | 2 | 0.80 |
| Tao Hua-min | 2 | 0 | 0.68 |
| Xiao Shan-zhu | 3 | 0 | 0.68 |
| Huadong Dai | 4 | 4 | 2.77 |