Name
Title | ||
|---|---|---|
Design of an IDM-based determinant computing unit for a 130nm low power CMOS ASIC acoustic localization processor |
Abstract | ||
|---|---|---|
A determinant computing circuit in floating point format has been designed and tested for use in a CMOS ASIC acoustic localization processor. The Internal Division Method (IDM) was used to implement the operation, employing a modified SRT radix-4 circuit for division operations. The unit was designed for VLSI implementation in a commercial 130 nm low-power CMOS process, with an operation frequency of 100 MHz. The algorithm employed is parallelizable for future prototypes, should a higher operation frequency be required. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/LASCAS.2015.7250489 | 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS) |
Keywords | Field | DocType |
Acoustic Localization,Multichannel Cross Correlation Coefficient,TDOA,Low Power VLSI,FPGA,UVM | Parallelizable manifold,Floating point,Computer science,Field-programmable gate array,CMOS,Cmos process,Electronic engineering,Multilateration,Cmos asic,Very-large-scale integration | Conference |
ISSN | Citations | PageRank |
2330-9954 | 0 | 0.34 |
References | Authors | |
2 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| roberto cerdasrobles | 1 | 0 | 0.34 |
| agustin rodriguez | 2 | 0 | 0.34 |
| Alfonso Chacon-rodriguez | 3 | 8 | 5.53 |
| Pedro Julian | 4 | 11 | 4.41 |