Title | ||
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Hybrid Lbdd Pwm Modulator For Digital Class-Bd Audio Amplifier Based On Stm32f407vgt6 Microcontroller And Analog Dll |
Abstract | ||
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In the paper a new architecture and implementation of the 9-bit hybrid LBDD PWM modulator for digital Class-BD audio amplifier has been proposed. First, the PCM audio signal is transformed into the requantized to 9-bit resolution DPWM data, using LBDD algorithm. Then the 9-bit DPWM data are converted into the two physical trains of PWM pulses to control the output power transistors, using two hybrid digital to time converters (HDTC). The HDTC converts 6 MSB data on the base counter method using advanced-control timers TIM1 and TIM8 of the STM32F407VGT6 microcontroller, while the remaining 4 LSB data - using a quantizer system based on the tapped voltage controlled delay line (TVCDL) put into the ADLL loop, which have been designed in 180nm CMOS technology from UMC. A basic feasibility study of proposed configuration has been performed. |
Year | Venue | Keywords |
---|---|---|
2015 | 2015 22ND INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS & SYSTEMS (MIXDES) | Class-D Digital Audio Amplifier, Digital Pulse Width Modulator (DPWM), Voltage Controlled Delay Line (VCDL), Analog Delay Locked Loop (ADLL), Digital to Time Converter (DTC) |
Field | DocType | Citations |
Audio signal,Computer science,Pulse-width modulation,Audio power amplifier,Electronic engineering,Delta-sigma modulation,Converters,CMOS,Microcontroller,Frequency modulation | Conference | 0 |
PageRank | References | Authors |
0.34 | 3 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Jacek Jasielski | 1 | 1 | 1.11 |
S. Kuta | 2 | 7 | 2.18 |
Wojciech Kolodziejski | 3 | 7 | 1.85 |
Witold Machowski | 4 | 8 | 2.87 |