Abstract | ||
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This paper presents an architectural design space exploration of the MPEG-4 AAC Inverse Modified Cosine Transform (IMDCT) starting from an algorithmic C++ description. Using a High-level Synthesis tool, several alternative solutions were generated with different results in terms of area and throughput. All designs have been synthesized and tested with FPGAs and the final architecture has shown similar resources utilization to the obtained with an RTL design, but requiring much less development time. We present a comparison of the costs for the two approaches regarding the silicon area, speed and required DSP resources. |
Year | DOI | Venue |
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2013 | 10.1109/LASCAS.2013.6519061 | 2013 IEEE 4TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS) |
Keywords | DocType | ISSN |
IMDCT, AAC Decoder, High-level Synthesis, FPGA | Conference | 2330-9954 |
Citations | PageRank | References |
0 | 0.34 | 6 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Renato Coral Sampaio | 1 | 5 | 3.59 |
Pedro A. Berger | 2 | 6 | 1.50 |
Ricardo Pezzuol Jacobi | 3 | 91 | 8.18 |