Name
Abstract | ||
|---|---|---|
The paper presents a cascoded power stage with automatic dead time generation. The circuit is using the inter-transistor node voltages of the cascode configuration as feedback control signals to delay turning ON the power transistors. The circuit is designed as the output stage of a fully-integrated buck converter. The steady-state operation is described. The waveforms simulated on 45-nm CMOS process show that in steady-state operation the short-circuit path and body diode conductions are avoided while effective zero-voltage switching (ZVS) are provided both for ground and power supply line; the calculated dead times are in a good agreement with simulation results. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/MWSCAS.2015.7282019 | 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS) |
Keywords | Field | DocType |
DC-DC converters,Buck converter,Cascoded Stage,Dead time auto-generation,ZVS | Dead time,Logic gate,Cascode,Computer science,Power semiconductor device,Voltage,Waveform,Electronic engineering,Control engineering,Transistor,Buck converter | Conference |
ISSN | Citations | PageRank |
1548-3746 | 0 | 0.34 |
References | Authors | |
2 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Igor Filanovsky | 1 | 21 | 8.68 |
| Jani K. Jarvenhaara | 2 | 8 | 3.83 |
| Nikolay T. Tchamov | 3 | 17 | 7.82 |