Title
I(Re)2-WiNoC: Exploring scalable wireless on-chip micronetworks for heterogeneous embedded many-core SoCs
Abstract
Modern embedded SoC design uses a rapidly increasing number of processing units for ubiquitous computing, forming the so-called embedded many-core SoCs (McSoC). Such McSoC devices allow superior performance gains while side-stepping the power and heat dissipation limitations of clock frequency scaling. The main advantage lies in the exploitation of parallelism, distributively and massively. Consequently, the on-chip communication fabric becomes the performance determinant. To bridge the widening gap between computation requirements and communication efficiency faced by gigascale McSoCs in the upcoming billion-transistor era, a new on-chip communication system, dubbed Wireless Network-on-Chip (WiNoC), has been proposed by using the recently developed RF interconnect technology. With the high data-rate, low power and ultra-short range interconnection provided by UWB technology, the WiNoC design paradigm calls for effective solutions to overhaul the on-chip communication infrastructure of gigascale McSoCs.
Year
DOI
Venue
2015
10.1016/j.dcan.2015.01.003
Digital Communications and Networks
Keywords
DocType
Volume
Network-on-Chip,RF interconnect,Topology design,Routing algorithm,Microarchitecture design
Journal
1
Issue
ISSN
Citations 
1
2352-8648
2
PageRank 
References 
Authors
0.36
11
4
Name
Order
Citations
PageRank
Dan Zhao118815.29
Yi Wang214410.65
Hongyi Wu384876.90
Takamaro Kikkawa46914.32