Name
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ISOCC.2011.6138780 | ISOCC |
Keywords | Field | DocType |
power transistors,integrated circuit design,negative bias temperature instability | Power semiconductor device,Computer science,Real-time computing,Degradation (geology),Electronic engineering,Power grid,Integrated circuit design,Negative-bias temperature instability,Optimization algorithm,Transistor,Manufacturing process | Conference |
Citations | PageRank | References |
0 | 0.34 | 5 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Masahiro Fukui | 1 | 42 | 14.57 |
| yoriaki nagata | 2 | 0 | 0.34 |
| Shuji Tsukiyama | 3 | 85 | 19.66 |