Name
Abstract | ||
|---|---|---|
Algorithms and architectures for performing modular multiplication operations are important in cryptography and Residue Number System. In this paper Montgomery's algorithm has been broken into two concurrent no-interleaved multiplication operations. The architectures derived from this algorithm are systolic and need near communication links only. Thus, very well suited for VLSI implementation. The presented architectures offer a great flexibility of finding the best trade-off between hardware cost and throughput rate by changing the digit size. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1109/ICECS.2001.957732 | ICECS 2001: 8TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-III, CONFERENCE PROCEEDINGS |
Keywords | DocType | Citations |
very large scale integration,multiplication operator,cryptography,electronic commerce,hardware,security,integrated circuit design,throughput rate,computer architecture,computer science,parallel algorithms,public key cryptography,vlsi,throughput,modular multiplication,modules,residue number system | Conference | 0 |
PageRank | References | Authors |
0.34 | 7 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Omar Nibouche | 1 | 89 | 13.50 |
| Ahmed Bouridane | 2 | 837 | 99.53 |
| Mokhtar Nibouche | 3 | 50 | 11.87 |