Title | ||
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A digital hardware fast algorithm and FPGA-based prototype for a novel 16-point approximate DCT for image compression applications |
Abstract | ||
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The discrete cosine transform (DCT) is the key step in many image and video coding standards. The eight-point DCT is an important special case, possessing several low-complexity approximations widely investigated. However, the 16-point DCT transform has energy compaction advantages. In this sense, this paper presents a new 16-point DCT approximation with null multiplicative complexity. The proposed transform matrix is orthogonal and contains only zeros and ones. The proposed transform outperforms the well-known Walsh-Hadamard transform and the current state-of-the-art 16-point approximation. A fast algorithm for the proposed transform is also introduced. This fast algorithm is experimentally validated using hardware implementations that are physically realized and verified on a 40 nm CMOS Xilinx Virtex-6 XC6VLX240T FPGA chip for a maximum clock rate of 342 MHz. Rapid prototypes on FPGA for a 8-bit input word size show significant improvement in compressed image quality by up to 1-2 dB at the cost of only eight adders compared to the state-of-art 16-point DCT approximation algorithm in the literature (Bouguezel et al 2010 Proc. 53rd IEEE Int. Midwest Symp. on Circuits and Systems). |
Year | DOI | Venue |
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2017 | 10.1088/0957-0233/23/11/114010 | MEASUREMENT SCIENCE AND TECHNOLOGY |
Keywords | DocType | Volume |
approximate DCT,fast algorithms,image compression,FPGA | Journal | 23 |
Issue | ISSN | Citations |
11 | 0957-0233 | 8 |
PageRank | References | Authors |
0.48 | 14 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
fabio m bayer | 1 | 20 | 1.75 |
Renato J. Cintra | 2 | 218 | 26.82 |
Amila Edirisuriya | 3 | 30 | 2.98 |
Arjuna Madanayake | 4 | 242 | 53.31 |