Abstract | ||
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This paper presents a 3-V-only 64-Mb 4-level-cell (2-b/cell) NOR-type channel-hot-electron (CHE) programmed flash memory fabricated in 0.18-/spl mu/m shallow-trench isolation CMOS technology. The device (die size 40 mm/sup 2/) is organized in 64 1-Mb sectors. Hierarchical column and row decoding ensures complete isolation between different sectors during any operation, thereby increasing device re... |
Year | DOI | Venue |
---|---|---|
2000 | 10.1109/4.881212 | IEEE Journal of Solid-State Circuits |
Keywords | DocType | Volume |
Channel hot electron injection,Flash memory,CMOS technology,Isolation technology,Voltage,Decoding,Throughput,Parallel programming,Error correction codes,Fabrication | Journal | 35 |
Issue | ISSN | Citations |
11 | 0018-9200 | 17 |
PageRank | References | Authors |
8.25 | 5 | 19 |
Name | Order | Citations | PageRank |
---|---|---|---|
G. Torelli | 1 | 94 | 30.34 |
Osama Khouri | 2 | 41 | 14.44 |
ANGELO VISCONTI | 3 | 105 | 18.12 |
A. Modelli | 4 | 58 | 19.16 |
A. Grossi | 5 | 17 | 8.25 |
R. Bez | 6 | 23 | 11.59 |
A. Pierin | 7 | 17 | 8.25 |
C. Golla | 8 | 17 | 8.25 |
I. Motta | 9 | 17 | 8.25 |
marco scotti | 10 | 39 | 11.10 |
A. Manstretta | 11 | 58 | 18.83 |
M. Picca | 12 | 17 | 8.25 |
A. Sacco | 13 | 17 | 8.25 |
S. Mognoni | 14 | 17 | 8.25 |
M. Zammattio | 15 | 17 | 8.25 |
E. Yero | 16 | 17 | 8.25 |
S. Commodaro | 17 | 17 | 8.25 |
R. Micheloni | 18 | 26 | 10.36 |
G. Campardo | 19 | 29 | 10.33 |