Name
Abstract | ||
|---|---|---|
In this paper we present how an asynchronous system, using micropipelines, can be modelled in a system level performance model. We have introduced structures for pipeline stages and feedback structures. The model has been used in order to find out at what complexity a micropipeline implementation can out-perform a synchro nous one, We have also used it for examining if micropipelines can be used as an alternative to clock-gating as a method for saving power. Results from these simulations are presented and compared to measurements on a complex asynchronous circuit. |
Year | DOI | Venue |
|---|---|---|
1996 | 10.1109/ICECS.1996.584543 | ICECS |
Keywords | DocType | Citations |
simulation,clock gating,asynchronous system,application specific integrated circuits,asynchronous circuit,semiconductor device modeling,logic gates | Conference | 0 |
PageRank | References | Authors |
0.34 | 2 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| B Oelmann | 1 | 77 | 21.78 |
| Hannu Tenhunen | 2 | 1709 | 190.57 |