Name
Abstract | ||
|---|---|---|
There are two groups of task scheduling algorithms in real-time systems. The first group contains algorithms that have constant asymptotic time complexity and thus these algorithms lead to deterministic task switch duration but smaller theoretical CPU utilisation. The second group contains complex algorithms that plan more efficient task sequences and thus the better CPU utilisation. The problem is that each task scheduling algorithm belongs to one of these two groups only. This is a motivation to design a real-time task scheduler that has all the benefits mentioned above. In order to reach this goal, we decided to reduce the time complexity of an algorithm from the second group by using hardware acceleration. We propose a scalable hardware representation of task scheduler in a form of coprocessor based on EDF algorithm. Thanks to the achieved constant time complexity, the hardware scheduler can help real-time systems to have more tasks that meet their deadlines while keeping high CPU utilisation and system determinism. Another advantage of our task scheduler is that any task can be removed from the scheduler according to the ID of the task, which increases expandability of the task scheduler. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/ECBS-EERC.2015.32 | ECBS-EERC |
Keywords | Field | DocType |
computer architecture,real time systems,hardware,scheduling algorithms,coprocessors | Scheduling (computing),Computer science,Real-time computing,Coprocessor,Time complexity,Computer hardware,Fixed-priority pre-emptive scheduling,Fair-share scheduling,Parallel computing,Field-programmable gate array,Hardware acceleration,Scalability,Embedded system | Conference |
Citations | PageRank | References |
7 | 0.77 | 3 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| luka kohutka | 1 | 7 | 0.77 |
| martin vojtko | 2 | 7 | 1.11 |
| Tibor Krajcovic | 3 | 8 | 2.18 |