Name
Abstract | ||
|---|---|---|
Numerous conventional interconnection networks have been designed in a way in which they use indirect or multistage topologies. The reason behind this idea is the fact that such topologies can minimize the network hop count. However, the constraints of technology and packaging have given impetus for fundamental changes in the approach to designing topologies. Increasing the radix of the network׳s routers lowers the total cost of the network, which is related to the number of routers׳ pins and connectors. This increase also results in lowering the power consumption, which plays a crucial role in the performance. Kim, Dally and Abts have provided a cost-efficient topology for high-radix networks, named the flattened Butterfly. They have shown that this approach is comparable to the conventional Butterfly networks with regard to cost. It is much the same as a Folded-Clos topology in terms of the performance per cost ratio under adversarial traffic, whilst under benign traffic, the flattened Butterfly has approximately twice this ratio. In this paper, we have generalized the idea of flattening to all Delta networks, in addition to some non-Delta ones such as Beneš and Clos. Moreover, the conditions on which multistage networks can be converted to the flattened ones have been generally provided. All the mentioned networks have also been compared with another cost-efficient topology, named the HyperX, in order to gain deep insight into the key facets of the microarchitecture of high-radix networks. On the other hand, advances in designing digital circuits and reduction in their size rely upon knowledge in nano-electronics for refinements of the standard copper interconnect technology. This copper interconnects have become a major performance bottleneck in Multistage Interconnection Network (MIN) platforms. Consequently, a minor contribution of this paper is the performance assessment of the aforementioned networks using the Carbon NanoTube (CNT) technology under trace-driven and synthetic traffic patterns; inasmuch as this technology has been introduced as one of the six most important architectures in future digital systems. CNT is considered to be a promising technology in the design and fabrication of the next-generation chips since it is capable of handling extremely high current densities for a long time without considerable performance degradation. Although the comparative study of different networks with various parameters is the main goal, it should be taken into consideration that in some situations, these parameters provide similar conditions in different networks. As such, they can be combined with an efficient method to present a simple model. Finally, we have used data mining in order to reach a unified and meaningful performance parameter. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1016/j.mejo.2015.07.003 | Microelectronics Journal |
Keywords | Field | DocType |
Multistage Interconnection Networks,Flattened Butterfly,High-radix routers,Carbon NanoTube Technology,Performance evaluation | Bottleneck,Digital electronics,Clos network,Copper interconnect,Electronic engineering,Multistage interconnection networks,Network topology,Engineering,Interconnection,Electrical engineering,Microarchitecture,Distributed computing | Journal |
Volume | Issue | ISSN |
46 | 10 | 0026-2692 |
Citations | PageRank | References |
0 | 0.34 | 15 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Majid Rezazadeh | 1 | 0 | 0.68 |
| Farshad Safaei | 2 | 95 | 19.37 |
| Mahsa Moazez | 3 | 0 | 0.68 |