Name
Abstract | ||
|---|---|---|
Ring oscillator (RO) based physically unclonable function (PUF) on FPGAs is popular for its nice properties and easy implementation. The conventional compensated measurement though proved to be particularly effective in extracting entropy of manufacturing features, only one bit entropy can be extracted from two ROs, which implies enormous consumption of hardware resources. Motivated by this, we propose an elegant and efficient method to extract at least 31 bits entropy from two ROs by utilizing the fine control of programmable delay lines of look up table (LUT), and denominate this new construction as Further ROPUF. We will elaborate how to take advantage of the underlying manufacturing variations of LUTs and display how deeper variations are extracted by the second order difference calculation method. Additionally, we reveal the consistency between the evaluation results on Xilinx FPGAs and by simulations, and the responds’ low bit-error-rate of 1.85(%) manifests the proposed FROPUF maintains considerable reliability. |
Year | Venue | DocType |
|---|---|---|
2016 | SecureComm | Conference |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Qinglong Zhang | 1 | 0 | 2.37 |
| Zongbin Liu | 2 | 0 | 4.73 |
| Cunqing Ma | 3 | 0 | 1.69 |
| Changting Li | 4 | 0 | 1.01 |
| Jiwu Jing | 5 | 0 | 1.01 |