Title
Router Attack toward NoC-enabled MPSoC and Monitoring Countermeasures against such Threat
Abstract
The growing number of applications and processing units in modern Multiprocessor Systems-on-Chips (MPSoCs) come along with reduced time to market. Different IP cores can come from different vendors, and their trust levels are also different, but typically they use Network-on-Chip (NoC) as their communication infrastructure. An MPSoC can have multiple Trusted Execution Environments (TEEs). Apart from performance, power, and area research in the field of MPSoC, robust and secure system design is also gaining importance in the research community. To build a secure system, the designer must know beforehand all kinds of attack possibilities for the respective system (MPSoC). In this paper we survey the possible attack scenarios on present-day MPSoCs and investigate a new attack scenario, i.e., router attack targeted toward NoC architecture. We show the validity of this attack by analyzing different present-day NoC architectures and show that they are all vulnerable to this type of attack. By launching a router attack, an attacker can control the whole chip very easily, which makes it a very serious issue. Both routing tables and routing logic-based routers are vulnerable to such attacks. In this paper, we address attacks on routing tables. We propose different monitoring-based countermeasures against routing table-based router attack in an MPSoC having multiple TEEs. Synthesis results show that proposed countermeasures, viz. Runtime-monitor, Restart-monitor, Intermediate manager, and Auditor, occupy areas that are 26.6, 22, 0.2, and 12.2 % of a routing table-based router area. Apart from these, we propose Ejection address checker and Local monitoring module inside a router that cause 3.4 and 10.6 % increase of a router area, respectively. Simulation results are also given, which shows effectiveness of proposed monitoring-based countermeasures.
Year
DOI
Venue
2015
10.1007/s00034-015-9980-0
CSSP
Keywords
Field
DocType
Multiprocessor System-on-Chip security, Network-on-Chip security, Hardware security, Monitoring countermeasure, Router attack in NoC
Hardware security module,Computer network,Multiprocessing,Core router,Router,Engineering,Routing table,Time to market,MPSoC,One-armed router,Embedded system
Journal
Volume
Issue
ISSN
34
10
1531-5878
Citations 
PageRank 
References 
6
0.43
19
Authors
3
Name
Order
Citations
PageRank
arnab kumar biswas1294.57
S. K. Nandy232050.83
Ranjani Narayan315521.06