Name
Abstract | ||
|---|---|---|
This paper presents a novel fully testable and diagnosable structure for phase-frequency detectors. All procedures of converting the conventional PFD to the fully testable one are reported step by step. Also, the probability-based testability of proposed architecture is calculated. In addition, area considerations related to new fully testable PFD are introduced completely. At last, the proposed structure is designed in both system level and circuit level. The results of fully testable PFD in 0.13-μm CMOS technology are shown. Simulation results confirm the theoretical analysis. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1007/s00034-013-9679-z | Circuits Systems and Signal Processing |
Keywords | Field | DocType |
Phase-Frequency Detector, PFD, DLL, PLL, Testable, Diagnosable | Testability,Phase-locked loop,CMOS,Electronic engineering,Detector,Mathematics,Phase frequency detector,System level | Journal |
Volume | Issue | ISSN |
33 | 4 | 1531-5878 |
Citations | PageRank | References |
0 | 0.34 | 12 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mohammad Reza Gholami | 1 | 218 | 17.14 |
| Yasser Baleghi | 2 | 7 | 3.17 |
| Gholamreza Ardeshir | 3 | 41 | 7.05 |