Title | ||
---|---|---|
Concurrent hardware architecture for dual-mode audio steganography processor-based FPGA. |
Abstract | ||
---|---|---|
•We propose concurrent hardware architecture for real-time audio steganography.•We implement and test the proposed hardware on Xilinx XC6SLX16 FPGA board.•The implemented hardware requires only 97 slices and consumes less than 148mW.•The implemented hardware processes data simultaneously with frequency up to 58.82.•Full data retrieval at embedding rate of 25% of the cover audio size. |
Year | DOI | Venue |
---|---|---|
2016 | 10.1016/j.compeleceng.2015.03.007 | Computers & Electrical Engineering |
Keywords | Field | DocType |
Audio steganography,Lifting wavelet transform (LWT),Security,Field programmable logic array (FPGA),Hardware description language (HDL),Dual mode processor | Steganography,Operating frequency,Computer science,Data retrieval,Parallel processing,Signal-to-noise ratio,Field-programmable gate array,Sound quality,Real-time computing,Embedded system,Hardware architecture | Journal |
Volume | Issue | ISSN |
49 | C | 0045-7906 |
Citations | PageRank | References |
3 | 0.42 | 16 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Haider Ismael Shahadi | 1 | 6 | 1.16 |
Razali Jidin | 2 | 18 | 3.45 |
Wong Hung Way | 3 | 3 | 0.42 |