Paper Info
Title
A New Triple-Slope Pipelined Time to Digital Converter by Stretching of Time
Abstract
This study investigates a novel approach for pipeline time-to-digital converters (TDCs) which employs analog interpolation and time stretching techniques for digitizing the time interval between two input signals as well as increasing resolution. In the proposed converter, analog interpolation is performed based on a triple-slope conversion. This converter will be a 9-bit pipeline TDC which contains three time stretching amplifiers (TSAs) and four 2.5-b/stage TDCs. This converter does not use delay lines in its structure. It features low circuit complexity, low sensitivity to temperature, power supply and process (PVT) variations and high accuracy compared with the TDCs which have previously been proposed. Also, the time resolution, the dynamic range and the linear range of the TDC are improved. The proposed structure reduces the active chip area, the power consumption and the figure of merit (FoM). In addition, the integral nonlinearity (INL) and the differential nonlinearity (DNL) errors are reduced. In order to evaluate the idea, the TDC is designed in TSMC 45-nm CMOS technology and simulated. Comparison of the theoretical and simulation results confirms the benefits of the proposed TDC.
Year
DOI
Venue
2015
10.1142/S0218126615501352
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
Keywords
DocType
Volume
Time-to-digital converter (TDC),pipeline TDC,analog interpolation,time stretching amplifier (TSA)
Journal
24
Issue
ISSN
Citations 
9
0218-1266
1
PageRank 
References 
Authors
0.39
8
2
Name
Order
Citations
PageRank
Mahdi Rezvanyvardom110.39
Ebrahim Farshidi2186.26