Name
Abstract | ||
|---|---|---|
Today and future many-core systems are facing the utilization wall and dark silicon problems, for which not all the processing engines can be powered at the same time as this will lead to a power consumption higher than the Total Design Power (TDP) budget. Recently, computational sprinting approaches addressed the problem by exploiting the intrinsic thermal capacitance of the chip and the properties of common applications, which require intense, but temporary, use of resources. The thermal capacitance, possibly augmented with phase change materials, enables the temporary activation of all the resources simultaneously, although they largely exceed the steady-state thermal design power. In this article, we present an innovative and low-overhead hierarchical model-predictive controller for managing thermally safe sprinting with predictable resprinting rate, which ensures the correct execution of mixed-criticality tasks. Well-targeted simulations, also based on real workload benchmarks, show the applicability and the effectiveness of our solution. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1145/2724715 | ACM Transactions on Embedded Computing Systems |
Keywords | Field | DocType |
Power management,Energy savings,Algorithms,Performance,Dark silicon,computational sprinting,thermal control,thermal model,MPSoC | Dark silicon,Control theory,Thermal design power,Thermal mass,Computer science,Workload,Model predictive control,Chip,Real-time computing,MPSoC | Journal |
Volume | Issue | ISSN |
14 | 3 | 1539-9087 |
Citations | PageRank | References |
1 | 0.37 | 36 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Andrea Tilli | 1 | 221 | 17.74 |
| Andrea Bartolini | 2 | 457 | 51.90 |
| Matteo Cacciari | 3 | 132 | 5.68 |
| Luca Benini | 4 | 13116 | 1188.49 |