Name
Abstract | ||
|---|---|---|
Due to technology downscaling, defect tolerance analysis has become a major concern in the design of digital circuits. In this paper, we present a novel analytical method that calculates the defect tolerance of logic circuits using probabilistic defect propagation. The proposed method is explained in case of single defect model, but can be easily adapted to handle multiple fault scenarios. The approach manages signal dependencies due to reconvergent fanouts, providing accurate results and performing simple operations. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1016/j.microrel.2015.06.059 | Microelectronics Reliability |
Keywords | Field | DocType |
Fault tolerance analysis,Analytical methods,Error propagation,Analog fault simulation | Downscaling,Digital electronics,Logic gate,Propagation of uncertainty,Tolerance analysis,Robustness (computer science),Electronic engineering,Probabilistic logic,Engineering,Reliability engineering | Journal |
Volume | Issue | ISSN |
55 | 9 | 0026-2714 |
Citations | PageRank | References |
1 | 0.39 | 10 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mariem Slimani | 1 | 23 | 7.05 |
| Arwa Ben Dhia | 2 | 32 | 5.50 |
| Lirida A. B. Naviner | 3 | 83 | 26.52 |