Abstract | ||
---|---|---|
We propose a flat, analytic, mixed-size placement algorithm ePlace-3D for three-dimension integrated circuits (3D-ICs) using nonlinear optimization. Our contributions are (1) electrostatics based 3D density function with globally uniform smoothness (2) 3D numerical solution with improved spectral formulation (3) 3D nonlinear pre-conditioner for convergence acceleration (4) interleaved 2D-3D placement for efficiency enhancement. Our placer outperforms the leading work mPL6-3D and NTUplace3-3D with 6.44% and 37.15% shorter wirelength, 9.11% and 10.27% fewer 3D vertical interconnects (VI) on average of IBM-PLACE circuits. Validation on the large-scale modern mixed-size (MMS) 3D circuits shows high performance and scalability. |
Year | DOI | Venue |
---|---|---|
2015 | 10.1145/2872334.2872361 | Proceedings of the 2016 on International Symposium on Physical Design |
DocType | Volume | Citations |
Journal | abs/1512.08291 | 5 |
PageRank | References | Authors |
0.43 | 35 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Jingwei Lu | 1 | 113 | 7.54 |
Hao Zhuang | 2 | 135 | 11.20 |
Ilgweon Kang | 3 | 30 | 6.09 |
Peng-Wen Chen | 4 | 90 | 11.56 |
Chung-Kuan Cheng | 5 | 2314 | 285.85 |