Name
Abstract | ||
|---|---|---|
NUCA caches have traditionally been proposed as a solution for mitigating wire delays, and delays introduced due to complex networks on chip. Traditional approaches have reported significant performance gains with intelligent block placement, location, replication, and migration schemes. In this paper, we propose a novel approach in this space, called FP-NUCA. It differs from conventional approach... |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/TPDS.2014.2358231 | IEEE Transactions on Parallel and Distributed Systems |
Keywords | Field | DocType |
Benchmark testing,Delays,Proposals,Multiplexing,Program processors,Distributed databases,Ports (Computers) | Parsec,Cache,Computer science,Computer network,Real-time computing,Fast path,Benchmark (computing),Distributed computing,Parallel computing,Network on a chip,VHDL,Router,One-armed router | Journal |
Volume | Issue | ISSN |
26 | 9 | 1045-9219 |
Citations | PageRank | References |
6 | 0.41 | 23 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Anuj Arora | 1 | 9 | 1.13 |
| Mayur Harne | 2 | 6 | 0.41 |
| Hameedah Sultan | 3 | 6 | 3.12 |
| Akriti Bagaria | 4 | 9 | 1.13 |
| Smruti R. Sarangi | 5 | 447 | 41.94 |