Title | ||
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A standardized design methodology for complex digital logic components of cyber-physical systems. |
Abstract | ||
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A complex digital logic system is modeled from various of logic components including combinational logic components, sequential logic components and compound logic components. In order to verify its completeness and stability, it is necessary to be unfolded to an equivalent compound logic component composed of some atomic components.Display Omitted Proposes a component-based modeling methodology for complex digital logic components.Presents an effectiveness verification solution including completeness and stability.A washing machine controller design shows that the modeling can reflect the design intent of the designers effectively. As an important part of cyber-physical systems, the digital logic system's complexity are rapidly increasing, and its design flows become more and more tedious. A modeling and verification methodology for complex digital logic components is presented to improve the development quality and efficiency. In order to help developer to understand the design intent preferably and speed up the development process, design activities are carried out under a convenient modeling methodology and a precise verification solution for completing the design cycle. Its calculus system offers a theoretic way to connect components via connectors, and then provides a theoretical basis for further verification. A washing machine controller design shows that the modeling can reflect the design intent of the designers effectively, detect some design errors which maybe result in modeling failures in implementation as soon as possible, and avoid the negligence and errors in modeling for complex digital systems. |
Year | DOI | Venue |
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2015 | 10.1016/j.micpro.2015.08.012 | Microprocessors and Microsystems - Embedded Hardware Design |
Keywords | Field | DocType |
CPS,Digital logic,Modeling,Effectiveness,Verification,Component | Logic synthesis,Functional verification,Sequential logic,Logic optimization,Computer science,Parallel computing,Real-time computing,Combinational logic,Boolean algebra,Register-transfer level,High-level verification | Journal |
Volume | Issue | ISSN |
39 | 8 | 0141-9331 |
Citations | PageRank | References |
1 | 0.35 | 12 |
Authors | ||
9 |