Paper Info
Title
Design Framework For Jpeg2000 System Architecture
Abstract
For the exploration of system architecture dedicated to JPEG2000 coding, decoding and codec, a novel design framework is constructed. In order to utilize the scalability of JPEG2000 algorithm aggressively in system implementation, three types of modules are prepared for JPEG2000 coding/decoding/codec processes, i.e. software, software accelerated with user-defined instructions, and dedicated hardware. Specifically, dedicated hardware modules for forward and inverse discrete wavelet transformation (shortly DWT), entropy coder, entropy decoder, and entropy codec as well as software acceleration for the DWT process arc devised to be used in the framework. Furthermore, a JPEG2000 encoder LSI, which consists of a configurable processor Xtensa, the DWT module, and the entropy coder, is fabricated to exemplify the system implementation designed through the use of proposed framework.
Year
DOI
Venue
2006
10.1080/10798587.2006.10642936
INTELLIGENT AUTOMATION AND SOFT COMPUTING
Keywords
DocType
Volume
JPEG2000, design framework, system architecture, configurable processor, Xtensa
Journal
12
Issue
ISSN
Citations 
3
1079-8587
0
PageRank 
References 
Authors
0.34
0
7
Name
Order
Citations
PageRank
Hiroshi Tsutsui12924.01
Takahiko Masuzaki252.24
Yoshiteru Hayashi320.84
Yoshitaka Taki420.84
Tomonori Izumi53420.88
Takao Onoye632968.21
Yukihiro Nakamura717750.18