Name
Abstract | ||
|---|---|---|
Energy efficiency and energy-proportional computing have become a central focus in modern supercomputers. Many previous energy-saving strategies have focused solely on the CPU while the DRAM subsystem has not been addressed sufficiently, even though memory consumes about 20 % of the total power in a typical server platform. This paper describes a novel runtime system that scales the frequency of both processor and DRAM-based on the performance and power models, also proposed here. Specifically, first, a performance-loss constraint is chosen for an application, then, an optimal processor---DRAM frequency pair is modeled such that the pair minimizes the energy consumption in a given timeslice. Experiments performed on SPEC CPU 2006, NAS NPB, and pARMS benchmarks demonstrate that the proposed runtime system may obtain total energy savings both for memory- and compute-intensive applications. In particular, as much as 22 % of energy was saved with a low performance loss of about 4.8 %. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1007/s11227-016-1680-4 | The Journal of Supercomputing |
Keywords | Field | DocType |
Static Strategy,Runtime System,Performance Counter,Processor Frequency,Memory Access Latency | Dram,Central processing unit,Computer science,Efficient energy use,Parallel computing,Frequency scaling,Spec#,Energy consumption,Runtime system,Distributed computing | Journal |
Volume | Issue | ISSN |
72 | 4 | 0920-8542 |
Citations | PageRank | References |
17 | 0.57 | 29 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Vaibhav Sundriyal | 1 | 17 | 1.58 |
| Masha Sosonkina | 2 | 272 | 45.62 |