Name
Abstract | ||
|---|---|---|
Designing RISC microprocessor cores for high-performance embedded systems requires a different perspective from system and processor architects. SandCraft, Inc. has developed its latest generation MIPS cores, emphasizing the need for a high degree of leverage between members of the microprocessor family. The Montage architecture introduces some novel features, such as accommodating extensions for added flexibility, which allow the processors to meet customer requirements. Already two family members, the SR1 and SR1-GX, have been implemented using the Montage architecture. These two cores were extensively modeled to verify their capabilities. The SR1 is optimized for high integer and floating-point performance, while the SR1-GX is an SR1 extended with a vector/scalar floating-point capability for accelerating 3D graphics applications. |
Year | DOI | Venue |
|---|---|---|
1999 | 10.1109/40.782567 | IEEE Micro |
Keywords | Field | DocType |
Reduced instruction set computing,Microprocessors,Pipelines,Intellectual property,Embedded system,Costs,Coprocessors,Home appliances,Integrated circuit modeling,Lifting equipment | Revenue,Architecture,Computer science,Parallel computing,Microprocessor,Real-time computing,Yesterday,Reduced instruction set computing,Intellectual property,Operating system,Embedded system,License | Journal |
Volume | Issue | ISSN |
19 | 4 | 0272-1732 |
Citations | PageRank | References |
3 | 0.47 | 1 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jack Choquette | 1 | 20 | 1.24 |
| Mayank Gupta | 2 | 118 | 10.60 |
| Dominic McCarthy | 3 | 3 | 0.47 |
| Jack Veenstra | 4 | 16 | 6.73 |