Title
An optimal implementation on FPGA of a hopfield neural network
Abstract
The associative Hopfield memory is a form of recurrent Artificial Neural Network (ANN) that can be used in applications such as pattern recognition, noise removal, information retrieval, and combinatorial optimization problems. This paper presents the implementation of the Hopfield Neural Network (HNN) parallel architecture on a SRAM-based FPGA. Themain advantage of the proposed implementation is its high performance and cost effectiveness: it requires O(1) multiplications and O(log N) additions, whereas most others require O(N) multiplications and O(N) additions.
Year
DOI
Venue
2011
10.1155/2011/189368
Adv. Artificial Neural Systems
Field
DocType
Volume
Binary logarithm,Associative property,Computer science,Field-programmable gate array,Static random-access memory,Time delay neural network,Artificial intelligence,Artificial neural network,Hopfield network,Noise removal,Machine learning
Journal
2011,
Citations 
PageRank 
References 
5
0.55
9
Authors
5
Name
Order
Citations
PageRank
Wassim Mansour1142.10
Rafic A. Ayoubi2667.60
Haissam Ziade3675.97
Velazco, R.4192.44
Wassim E. L. Falou5112.19