Paper Info
Title
Execution-driven parallel simulation of PGAS applications on heterogeneous tiled architectures
Abstract
We present a parallel execution-driven simulator for the efficient simulation of heterogeneous tile-based multi-core architectures. Here, the architecture is composed of several tiles connected via a network-on-chip and each tile contains local memory as well as several possibly different types of compute resources. Partitioned Global Address Space (PGAS) is a programming model matching very well the needs for programming of such modern multi-core architectures. In order to provide performance estimations for parallel software and enable architecture design space exploration, fast functional and timing simulation techniques are required. Thus, we present a simulator that meets this requirement by combining a fast direct-execution simulation approach with different parallelization strategies. Here, we propose four novel parallel discrete-event simulation techniques, which map thread-level parallelism within the applications to core-level parallelism on the target architecture and back to thread-level parallelism on the host machine. In order to achieve this, the correct synchronization and activation of the host threads is necessary being the main focus of this paper. Experiments with parallel real-world applications are used to compare the different techniques against each other and demonstrate that 10.4 times faster simulations than a sequential simulation can be achieved on a 12-core Intel Xeon processor.
Year
DOI
Venue
2015
10.1145/2744769.2744840
DAC
Field
DocType
ISSN
Cellular architecture,Model checking,Programming paradigm,Computer science,Task parallelism,Parallel computing,Thread (computing),Real-time computing,Data parallelism,Xeon,Partitioned global address space
Conference
0738-100X
Citations 
PageRank 
References 
5
0.45
15
Authors
4
Name
Order
Citations
PageRank
Sascha Roloff1304.14
David Schafhauser250.45
Frank Hannig359575.66
Jürgen Teich42886273.54