Paper Info
Title
Analysis of InAs-Si heterojunction double-gate tunnel FETs with vertical tunneling paths.
Abstract
InAs-Si double-gate TFETs exploiting the two-dimensional (2D) density-of-state (DOS) switch are studied. A full-band and atomistic quantum transport simulator based on the sp(3)d(5)s* tight-binding model is used to solve the quantum transport problem taking into account both lateral and vertical band-to-band tunneling paths. TFETs with only vertical tunneling components are also investigated. Our findings suggest that InAs-Si 2D-2D TFETs might offer a device solution with both steep sub-thermal sub-threshold swing (SS) and high ON-current. In the best case of an extremely thin InAs-Si 2D-2D TFET the minimal swing reaches SS = 12mV/dec and the ON-current 241 A/m.
Year
Venue
Keywords
2015
Proceedings of the European Solid-State Device Research Conference
switches,logic gates,tunneling,silicon,heterojunctions
Field
DocType
ISSN
Quantum tunnelling,Logic gate,Quantum transport,Electronic engineering,Heterojunction,Materials science,Silicon,Swing
Conference
1930-8876
Citations 
PageRank 
References 
0
0.34
2
Authors
3
Name
Order
Citations
PageRank
Hamilton Carrillo-Nunez110.82
Mathieu Luisier2568.55
A. Schenk364.24