Name
Abstract | ||
|---|---|---|
This paper explores a new dependable real-time task execution scheme for a many-core system. This scheme is based on duplication with temporary TMR and reconfiguration. Unlike a common scheme with several spare units, every processor core in our scheme is used for task execution. Thus, redundant processor cores contribute to both the reliability and performance of the entire system. We first show the implementation details of our scheme. Then the proposed scheme is analytically evaluated using abstracted models and compared with two other schemes. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/DFT.2015.7315162 | 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) |
Keywords | Field | DocType |
Duplicated task execution,Temporary TMR execution,Pair reconfiguration,Automotive applications | Spare part,Computer science,Real-time computing,Redundancy (engineering),Multi-core processor,Control reconfiguration,Actuator,Distributed computing,Embedded system | Conference |
ISSN | Citations | PageRank |
1550-5774 | 2 | 0.45 |
References | Authors | |
9 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tomohiro Yoneda | 1 | 353 | 41.62 |
| Masashi Imai | 2 | 36 | 7.63 |
| Hiroshi Saito | 3 | 21 | 6.61 |
| Kenji Kise | 4 | 149 | 26.53 |