Abstract | ||
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Sparse matrix vector multiplication (SpMV) is a linear algebra construct commonly found in machine learning (ML) algorithms, such as support vector machine (SVM). We profiled a popular SVM software (libSVM) on an energy-efficient microserver and a high-performance server for real-world ML datasets, and observed that SpMV dominates runtime. We propose a novel SpMV algorithm tailored for ML and a hardware accelerator architecture design based on this algorithm. Our evaluations show that the proposed algorithm and hardware accelerator achieves significant efficiency improvements over the conventional SpMV algorithm used in libSVM.
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Year | DOI | Venue |
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2015 | 10.1109/CASES.2015.7324551 | International Conference on Compilers, Architectures, and Synthesis for Embedded Systems |
Keywords | Field | DocType |
Hardware accelerator, machine learning, support vector machine, Algorithms, Performance, Design | Structured support vector machine,Linear algebra,Algorithm design,Sparse matrix-vector multiplication,Computer science,Parallel computing,Support vector machine,Hardware acceleration,Relevance vector machine,Sparse matrix | Conference |
ISSN | ISBN | Citations |
2381-1560 | 978-1-4673-8320-2 | 10 |
PageRank | References | Authors |
0.54 | 12 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Eriko Nurvitadhi | 1 | 399 | 33.08 |
Asit K. Mishra | 2 | 1216 | 46.21 |
Debbie Marr | 3 | 175 | 12.39 |