Name
Abstract | ||
|---|---|---|
A micro-power incremental delta-sigma (I-ΣS) ADC is presented. This ADC uses its decimation filter's output to estimate the input signal level and dynamically adjusts the modulator feedback voltage, thereby reducing the integrator input range and power. For further power saving, integrator time-multiplexing is also employed. Fabricated in 0.18μm CMOS, the 0.12mm2 ADC consumes 2.16μW at a conversion speed of 85S/s, 15.3b resolution and -2/1.5LSB INL. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/ASPDAC.2016.7427975 | 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC) |
Keywords | Field | DocType |
incremental delta-sigma ADC,integrator multiplexing,dual-feedback ΣS modulator,low power ADC | Digital filter,Decimation,Control theory,Computer science,Voltage,Integrator,Delta-sigma modulation,Modulation,Electronic engineering,CMOS,Integrating ADC | Conference |
Citations | PageRank | References |
0 | 0.34 | 3 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Bo Wang | 1 | 16 | 6.72 |
| Man Kay Law | 2 | 90 | 11.78 |
| saqib mohamad | 3 | 2 | 3.18 |
| Amine Bermak | 4 | 493 | 90.25 |