Abstract | ||
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Bitslice is a non-conventional way to implement algorithms using a scalar processor as a SIMD. It involves breaking down the algorithm into logical bit operations so that N parallel <operations are possible on a single N-bit microprocessor. It is applied to encryption algorithms, processing N consecutive blocks simultaneously, to achieve high throughput. Security applications using the KeeLoq algorithm are not suitable to traditional bitslice implementations because usually there are no N blocks to be processed. We propose a KeeLoq bitslice implementation, derived from its Algebraic Normal Form, for a single input block as a countermeasure against side-channel attacks. Our experimental results show there is no timing information leaked with an improvement factor of 3.01 in executed cycles. However, the implementation is still vulnerable to differential side-channel analysis, so we propose a secured variation that increases the resistance against differential power analysis without timing leakage, with a lower improvement factor of 1.21 in executed cycles.
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Year | Venue | Field |
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2015 | WESS | Countermeasure,Scalar processor,KeeLoq,Computer science,Parallel computing,SIMD,Side channel attack,Software implementation |
DocType | ISBN | Citations |
Conference | 978-1-4503-3667-3 | 0 |
PageRank | References | Authors |
0.34 | 13 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Pedro MalagóN | 1 | 58 | 13.59 |
Juan-Mariano de Goyeneche | 2 | 52 | 7.71 |
David Fraga | 3 | 79 | 8.51 |
José Manuel Moya | 4 | 114 | 18.82 |