Name
Abstract | ||
|---|---|---|
This paper presents an embedded test instrument for on-chip phase noise evaluation of analog/IF signals. The technique relies on 1 -- bit signal acquisition and dedicated processing to compute a digital signature related to the phase noise level. An appropriate algorithm based on on-the-fly processing of the 1-bit signal is defined in order to implement the BIST module with minimal hardware resources. The module is validated through behavioral and structural simulations. Its implementation in CMOS 140nm technology occupies only 7,885μm2, which represents an extremely small silicon area. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/DDECS.2015.11 | 2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems |
Keywords | Field | DocType |
noise measurement,phase noise,analog/IF signals,1-bit acquisition,digital signal processing,Built-In-Self-Test,BIST,test cost reduction | Digital signal processing,Signal acquisition,Noise measurement,Computer science,Phase noise,Digital signature,Real-time computing,CMOS,Electronic engineering,Built-in self-test | Conference |
ISBN | Citations | PageRank |
978-1-4799-6779-7 | 0 | 0.34 |
References | Authors | |
7 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Florence Azaïs | 1 | 11 | 4.22 |
| Stephane David-Grignot | 2 | 8 | 3.09 |
| Laurent Latorre | 3 | 9 | 2.44 |
| Francois Lefevre | 4 | 15 | 5.70 |