Paper Info
Title
Optimized Use of Parallel Programming Interfaces in Multithreaded Embedded Architectures
Abstract
Thread-level parallelism (TLP) exploitation for embedded systems has been a challenge for software developers: while it is necessary to take advantage of the availability of multiple cores, it is also mandatory to consume less energy. To speed up the development process and make it as transparent as possible, software designers use parallel programming interfaces (PPIs). However, as will be shown in this paper, each one implements different ways to exchange data, influencing performance, energy consumption and energy-delay product (EDP), which varies across different embedded processors. By evaluating four PPIs and three multicore processors, we demonstrate that it is possible to save up to 62% in energy consumption and achieve up to 88% of EDP improvements by just switching the PPI, and that the efficiency (i.e., The best possible use of the available resources) decreases as the number of threads increases in almost all cases, but at distinct rates.
Year
DOI
Venue
2015
10.1109/ISVLSI.2015.85
ISVLSI
Keywords
Field
DocType
Parallel programming interfaces,Performance and energy efficiency evaluation,Multithreaded embedded architectures
Instruction set,Computer science,Parallel computing,Thread (computing),Software,Memory management,Multi-core processor,Energy consumption,Benchmark (computing),Speedup,Embedded system
Conference
ISSN
ISBN
Citations 
2159-3469
978-1-4799-8718-4
3
PageRank 
References 
Authors
0.45
11
4
Name
Order
Citations
PageRank
Arthur Francisco Lorenzon1469.07
Anderson Luiz Sartor2317.67
Márcia C. Cera3263.30
Antonio Carlos Schneider Beck4273.42