Name
Abstract | ||
|---|---|---|
Dynamic voltage and frequency scaling (DVFS) is commonly employed on modern superscalar processors to reduce energy when peak performance is not needed or allowed. As technology scales, the effectiveness of DVFS is limited by the shrinking viable supply voltage range. This work proposes dynamic core scaling (DCS) to extend performance-energy tradeoff capabilities in superscalar processors. DCS ensures that programs run at a given percentage of their maximum speed and, at the same time, minimizes energy consumption by dynamically adjusting the active superscalar datapath resources. Evaluations using an 8-way superscalar processor implemented on 45nm circuit infrastructure show that DCS is more effective in performance-energy tradeoffs than DVFS at the high performance end. When used together with DVFS, DCS saves an additional 20% of a full-size core's energy on average. At the minimum operating voltage, DVFS stops reducing energy, while DCS is still able to achieve an average of 46% further energy reduction. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/ICCD.2015.7357120 | International Conference on Computer Design |
Keywords | Field | DocType |
dynamic core scaling,DVFS,dynamic voltage,frequency scaling,modern superscalar processors,peak performance,supply voltage range,DCS,performance-energy tradeoff capabilities,energy consumption,active superscalar datapath resources,8-way superscalar processor,circuit infrastructure,performance-energy tradeoffs,energy reduction | Pipeline transport,Datapath,Computer science,Parallel computing,Voltage,Real-time computing,Energy reduction,Frequency scaling,Energy consumption,Scaling,Embedded system,Operating voltage | Conference |
Citations | PageRank | References |
2 | 0.39 | 19 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Zhang Wei | 1 | 392 | 53.03 |
| Hang Zhang | 2 | 2 | 0.39 |
| John Lach | 3 | 1898 | 187.99 |